,---------------. | Contributions | `---------------ยด ,------------------------------------------ | 2023-06-19 13:36:15 StephenPelc wrote: | proposal - 16-bit memory access | see: https://forth-standard.org/proposals/16-bit-memory-access#contribution-301 `------------------------------------------ # Authors Stephen Pelc, stephen@vfxforth.com Leon Wagner, leon@forth.com # Change Log 19 June 2023, First release # Problem 16-bit data items are often required, e.g. for networks, for input and output, and for operating system data structures. Words to fetch and store data of this size are not yet standardised. # Solution The words `W@`,`W!` and `W,` are in common use. # Proposal 6.1.xxxx `W@` w-fetch CORE ( w-addr -- w16 ) Fetch the 16-bit item stored at w-addr. When the cell size is greater than 16 bits, the unused high-order bits are all zeroes. See: 3.3.3.1 Address alignment. 6.1.xxx `W!` w-store CORE ( w16 w-addr -- ) Store a 16-bit item at w-addr. When a 16-bit item is smaller than cell size, only the number of low-order bits corresponding to character size are transferred. See: 3.3.3.1 Address alignment. 6.1.xxx `W,` c-comma CORE ( w16 -- ) Reserve space for one 16-bit item in the data space and store w16 in the space. If the data-space pointer is 16-bit aligned when `W,` begins execution, it will remain 16-bit aligned when `W,` finishes execution. An ambiguous condition exists if the data-space pointer is not 16-bit aligned prior to execution of `W,`. See: 3.3.3.1 Address alignment. # Rationale The majority of new Forth systems developed in the 21st century use 32-bit or 64-bit cells. This proposal covers 16-bit memory access operators for such systems. # Reference Implementation These words are hardware and implementation dependent. ,------------------------------------------ | 2023-06-19 13:37:39 StephenPelc wrote: | proposal - 32-bit memory operators | see: https://forth-standard.org/proposals/32-bit-memory-operators#contribution-302 `------------------------------------------ # Authors Stephen Pelc, stephen@vfxforth.com Leon Wagner, leon@forth.com # Change Log 19 June 2023, First release # Problem 32-bit data items are often required, e.g. for networks, for input and output, and for operating system data structures. Words to fetch and store data explicitly of this size are not yet standardised. When performing conversions from 32-bit to 64-bit Forth systems and operating systems, the solution below has proven to be valuable. # Solution The words `L@`,`L!` and `L,` are proposed for standardisation. When porting a substantial body of 32-bit source code to a 64-bit Forth, these words saved much time by making it possible for the same source code to work on both 32-bit and 64-bit Forth systems. Provision of these words makes no sense if the system cell size is less than 32 bits. # Proposal 6.1.xxxx `L@` l-fetch CORE ( l-addr -- x ) Fetch the 32-bit item stored at l-addr. When the cell size is greater than character size, the unused high-order bits are all zeroes. An ambiguous condition occurs if the system cell size is less than 32 bits. See: 3.3.3.1 Address alignment. 6.1.xxx `L!` l-store CORE ( x l-addr -- ) Store a 32-bit item at l-addr. When a 32-bit item is smaller than cell size, only the number of low-order bits corresponding to character size are transferred. An ambiguous condition occurs if the system cell size is less than 32 bits. See: 3.3.3.1 Address alignment. 6.1.xxx `L,` l-comma CORE ( l32 -- ) Reserve space for one 32-bit item in the data space and store l32 in the space. If the data-space pointer is 32-bit aligned when `L,` begins execution, it will remain 32-bit aligned when `L,` finishes execution. An ambiguous condition exists if the data-space pointer is not 32-bit aligned prior to execution of `L,`. An ambiguous condition occurs if the system cell size is less than 32 bits. See: 3.3.3.1 Address alignment. # Rationale The majority of new Forth systems developed in the 21st century use 32-bit or 64-bit cells. This proposal covers 32-bit memory access operators for such systems. Where portability is required, the provision of the 32-bit words is sensible in 32-bit systems and enhances readability. # Reference Implementation These words are hardware and implementation dependent.